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Bit 6—External Trigger Select (TRGE): Bit 6 enables or disables the start of A/D conversion by
external trigger input.
Bit 6: TRGE
Description
0
Disables start of A/D conversion by external trigger
1
Enables start of A/D conversion by rising or falling edge of external trigger at
pin ADTRG*
Note:
*
The external trigger (ADTRG) edge is selected by bit INTEG4 of the IRQ edge select
register (IEGR). See Interrupt Edge Select Register (IEGR) in section 3.3.2, Interrupt
Control Registers, for details.
Bits 5 and 4—Reserved Bits: Bits 5 and 4 are reserved; they are always read as 1, and cannot be
modified.
Bits 3 to 0—Channel Select (CH3 to CH0): Bits 3 to 0 select the analog input channel.
The channel selection should be made while bit ADSF is cleared to 0.
Bit 3:
Bit 2:
CH3
CH2
0
0
1
1
0
1
1
Legend: * Don't care
Note:
1. Channels AN
selected in the H8/3854 Group.
Bit 1:
Bit 0:
CH1
CH0
*
*
0
0
1
1
0
1
0
0
1
1
0
1
*
*
to AN
are functions of the H8/3857 Group only, and must not be
0
3
Analog Input Channel
No channel selected
1
AN
*
0
1
AN
*
1
1
AN
*
2
1
AN
*
3
AN
4
AN
5
AN
6
AN
7
Reserved
Rev.3.00 Jul. 19, 2007 page 319 of 532
12. A/D Converter
(initial value)
(initial value)
REJ09B0397-0300
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