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Block Diagram
Figure 9.3 shows a block diagram of timer C.
UD
φ
TMIC
φ
/4
W
Legend:
TMC:
Timer mode register C
TCC:
Timer counter C
TLC:
Timer load register C
IRRTC:
Timer C overflow interrupt request flag
PSS:
Prescaler S
Pin Configuration
Table 9.8 shows the timer C pin configuration.
Table 9.8
Pin Configuration
Name
Timer C event input
Timer C up/down control
Register Configuration
Table 9.9 shows the register configuration of timer C.
PSS
Figure 9.3 Block Diagram of Timer C
Abbr.
TMIC
UD
TMC
TCC
TLC
I/O
Function
Input
Event input to TCC
Input
Selection of counting direction
Rev.3.00 Jul. 19, 2007 page 221 of 532
9. Timers
IRRTC
REJ09B0397-0300
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