Register Descriptions - Renesas F-ZTAT H8 Series Hardware Manual

8-bit single-chip microcomputer
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10. Serial Communication Interface
Pin Configuration
Table 10.4 shows the SCI3 pin configuration.
Table 10.4 Pin Configuration
Name
SCI3 clock
SCI3 receive data input
SCI3 transmit data output
Register Configuration
Table 10.5 shows the SCI3 internal register configuration.
Table 10.5 SCI3 Registers
Name
Serial mode register
Bit rate register
Serial control register 3
Transmit data register
Serial status register
Receive data register
Transmit shift register
Receive shift register
Bit rate counter
Legend:
⎯: Cannot be read or written.
10.3.2

Register Descriptions

Receive Shift Register (RSR)
Bit
Read/Write
Rev.3.00 Jul. 19, 2007 page 262 of 532
REJ09B0397-0300
Abbr.
SCK
3
RXD
TXD
Abbr.
SMR
BRR
SCR3
TDR
SSR
RDR
TSR
RSR
BRC
7
6
5
I/O
Function
I/O
SCI3 clock input/output
Input
SCI3 receive data input
Output
SCI3 transmit data output
R/W
Initial Value
R/W
H'00
R/W
H'FF
R/W
H'00
R/W
H'FF
R/W
H'84
R
H'00
*
*
*
4
3
Address
H'FFA8
H'FFA9
H'FFAA
H'FFAB
H'FFAC
H'FFAD
2
1
0

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