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6. ROM
To prevent such abnormal operations, therefore, it is necessary to ensure correct operation in
accordance with the program/erase algorithm, with the flash write enable (FWE) voltage applied,
and to conduct constant monitoring for MCU errors, internally and externally, using the watchdog
timer or other means. There may also be cases where the flash memory is in an erroneous
programming or erroneous erasing state at the point of transition to the protect mode, or where
programming or erasing is not properly carried out because of an abort. In cases such as these, a
forced recovery (program rewrite) must be executed using boot mode. However, it may also
happen that boot mode cannot be normally initiated because of overprogramming or overerasing.
6.7
Interrupt Handling during Flash Memory Programming and Erasing
All interrupts should be disabled when flash memory is being programmed or erased (while the P
or E bit is set in FLMCR1) and while the boot program is executing in boot mode*
priority to the program or erase operation. There are three reasons for this:
1. Interrupt occurrence during programming or erasing might cause a violation of the
programming or erasing algorithm, with the result that normal operation could not be assured.
2. In the interrupt exception handling sequence during programming or erasing, the vector would
not be read correctly*
3. If an interrupt occurred during boot program execution, it would not be possible to execute the
normal boot mode sequence.
For these reasons, there are conditions for disabling interrupts in the on-board programming
modes alone, as an exception to the general rule. However, this provision does not guarantee
normal erasing and programming or MCU operation.
All interrupt requests must therefore be disabled inside and outside the MCU when flash memory
is programmed or erased.
Notes: 1. Interrupt requests must be disabled inside and outside the MCU until programming by
the programming control program has been completed.
2. The vector may not be read correctly in this case for the following two reasons:
•
If flash memory is read while being programmed or erased (while the P or E bit is
set in FLMCR1), correct read data will not be obtained (undefined values will be
returned).
•
If a value has not yet been written in the interrupt vector table, interrupt exception
handling will not be executed correctly.
Rev.3.00 Jul. 19, 2007 page 148 of 532
REJ09B0397-0300
2
, possibly resulting in MCU runaway.
1
, to give
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