Appendix B Internal I/O Registers
Address Register
(low)
Name
Bit 7
H'C2
H'C3
H'C4
AMR
CKS
H'C5
ADRR
ADR7
H'C6
ADSR
ADSF
H'C7
H'C8
PMR1
IRQ3
⎯
H'C9
PMR2
H'CA
H'CB
PMR4
NMOD7 NMOD6 NMOD5 NMOD4 NMOD3 NMOD2 NMOD1 NMOD0
H'CC
PMR5
WKP7
H'CD
H'CE
H'CF
H'D0
H'D1
H'D2
H'D3
H'D4
PDR1
P1
7
H'D5
PDR2
P2
7
H'D6
⎯
H'D7
PDR4
H'D8
PDR5
P5
7
H'D9
H'DA
H'DB
H'DC
PDR9
P9
7
⎯
H'DD
PDRA
H'DE
PDRB
PB
7
H'DF
H'E0
PUCR1
PUCR1
H'E1
H'E2
PUCR5
PUCR5
H'E3
Rev.3.00 Jul. 19, 2007 page 466 of 532
REJ09B0397-0300
Bit 6
Bit 5
Bit 4
⎯
⎯
TRGE
ADR6
ADR5
ADR4
⎯
⎯
⎯
⎯
⎯
IRQ1
⎯
⎯
⎯
WKP6
WKP5
WKP4
⎯
⎯
P1
5
P2
P2
P2
6
5
⎯
⎯
⎯
P5
P5
P5
6
5
P9
P9
P9
6
5
⎯
⎯
⎯
PB
PB
PB
6
5
⎯
⎯
PUCR1
7
5
PUCR5
PUCR5
PUCR5
7
6
5
Bit Names
Bit 3
Bit 2
CH3
CH2
ADR3
ADR2
⎯
⎯
⎯
TMOFH TMOFL
⎯
IRQ0
WKP3
WKP2
⎯
P1
2
P2
P2
4
3
2
P4
P4
3
2
P5
P5
4
3
2
P9
P9
4
3
2
PA
PA
3
2
⎯
⎯
4
⎯
PUCR1
PUCR5
PUCR5
4
3
Bit 1
Bit 0
CH1
CH0
ADR1
ADR0
⎯
⎯
TMOW
⎯
IRQ4
WKP1
WKP0
P1
P1
1
0
P2
P2
1
0
P4
P4
1
0
P5
P5
1
0
P9
P9
1
0
PA
PA
1
0
⎯
⎯
PUCR1
PUCR1
2
1
0
PUCR5
PUCR5
2
1
0
Module
Name
A/D
converter
I/O ports
I/O ports