Renesas F-ZTAT H8 Series Hardware Manual page 513

8-bit single-chip microcomputer
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TCSRF—Timer control/status register F
Bit
OVFH
Initial value
Read/Write
R/(W)
Compare match flag L
0 [Clearing condition]
1 [Setting condition]
Timer overflow flag L
0 [Clearing condition]
After reading OVFL = 1, cleared by writing 0 to OVFL
1 [Setting condition]
When the value of TCFL goes from H'FF to H'00
Counter clear H
0 16-bit mode:
8-bit mode:
1
16-bit mode:
8-bit mode:
Timer overflow interrupt enable H
0 TCFH overflow interrupt disabled
1 TCFH overflow interrupt enabled
Compare match flag H
0 [Clearing condition]
After reading CMFH = 1, cleared by writing 0 to CMFH
1 [Setting condition]
When the TCFH value matches the OCRFH value
Timer overflow flag H
0 [Clearing condition]
After reading OVFH = 1, cleared by writing 0 to OVFH
1 [Setting condition]
When the value of TCFH goes from H'FF to H'00
Note:
Only a write of 0 for flag clearing is possible.
*
7
6
5
CMFH
OVIEH
0
0
0
*
R/(W)
*
R/W
Timer overflow interrupt enable L
0 TCFL overflow interrupt disabled
1 TCFL overflow interrupt enabled
After reading CMFL = 1, cleared by writing 0 to CMFL
When the TCFL value matches the OCRFL value
TCF clearing by compare match disabled
TCFH clearing by compare match disabled
TCF clearing by compare match enabled
TCFH clearing by compare match enabled
Appendix B Internal I/O Registers
H'B7
4
3
CCLRH
OVFL
CMFL
0
0
R/W
R/(W)
*
R/(W)
Counter clear L
0 TCFL clearing by compare match disabled
1 TCFL clearing by compare match enabled
Rev.3.00 Jul. 19, 2007 page 487 of 532
Timer F
2
1
0
OVIEL
CCLRL
0
0
0
*
R/W
R/W
REJ09B0397-0300

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