Renesas F-ZTAT H8 Series Hardware Manual page 75

15
op
15
op
15
op
op
15
op
op
15
op
op
15
op
op
15
op
15
op
op
15
op
op
Legend:
op: Operation field
rm, rn: Register field
abs: Absolute address
IMM: Immediate data
Figure 2.7 Bit Manipulation Instruction Codes (1)
8 7
IMM
8 7
rm
8 7
rn 0
IMM 0
8 7
rn 0
rm 0
8 7
abs
IMM 0
8 7
abs
rm 0
8 7
IMM
8 7
rn 0
IMM 0
8 7
abs
IMM 0
BSET, BCLR, BNOT, BTST
0
Operand: register direct (Rn)
rn
Bit No.: immediate (#xx:3)
0
Operand: register direct (Rn)
rn
Bit No.: register direct (Rm)
0
0 0 0
Operand: register indirect (@Rn)
0 0 0
Bit No.: immediate (#xx:3)
0
0 0 0
Operand: register indirect (@Rn)
0 0 0
Bit No.: register direct (Rm)
0
Operand: absolute (@aa:8)
0 0 0
Bit No.: immediate (#xx:3)
0
Operand: absolute (@aa:8)
0 0 0
Bit No.: register direct (Rm)
BAND, BOR, BXOR, BLD, BST
0
Operand: register direct (Rn)
rn
Bit No.: immediate (#xx:3)
0
0 0 0
Operand: register indirect (@Rn)
0 0 0
Bit No.: immediate (#xx:3)
0
Operand: absolute (@aa:8)
0 0 0
Bit No.: immediate (#xx:3)
Rev.3.00 Jul. 19, 2007 page 49 of 532
2. CPU
REJ09B0397-0300