Renesas F-ZTAT H8 Series Hardware Manual page 244

8-bit single-chip microcomputer

Hide thumbs Also See for F-ZTAT H8 Series:

Table of Contents

Timer Counter B (TCB)

Initial value

TCB is an 8-bit read-only up-counter, which is incremented by internal clock or external event

input. The clock source for input to this counter is selected by bits TMB2 to TMB0 in timer mode

When TCB overflows from H'FF to H'00 or to the value set in TLB, the IRRTB bit in interrupt

request register 2 (IRR2) is set to 1.

TCB is allocated to the same address as timer load register B (TLB).

Upon reset, TCB is initialized to H'00.

Timer Load Register B (TLB)

Initial value

TLB is an 8-bit write-only register for setting the reload value of timer counter B.

When a reload value is set in TLB, the same value is loaded into timer counter B (TCB) as well,

and TCB starts counting up from that value. When TCB overflows during operation in auto-reload

mode, the TLB value is loaded into TCB. Accordingly, overflow periods can be set within the

range of 1 to 256 input clocks.

The same address is allocated to TLB as to TCB.

Upon reset, TLB is initialized to H'00.

Rev.3.00 Jul. 19, 2007 page 218 of 532

REJ09B0397-0300