Watchdog Timer Operating Modes - Renesas F-ZTAT H8 Series Hardware Manual

8-bit single-chip microcomputer
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Example: With 30 ms overflow period when φ = 4 MHz (φ/8192 selected)
4 × 10
6
8192
Therefore, 256 – 15 = 241 (H'F1) is set in TCW.
H'FF
H'F1
TCW
count value
H'00
H'F1 written
to TCW
Internal reset signal
9.6.4

Watchdog Timer Operating Modes

Watchdog timer operating modes are shown in table 9.15.
Table 9.15 Watchdog Timer Operating Modes
Operating
mode
Reset
TCW
Reset
TCSRW
Reset
TMW
Reset
× 30 × 10
–3
= 14.6
Start
H'F1 written to TCW
Figure 9.9 Example of Watchdog Timer Operation
Active
Sleep
Functions
Functions
Functions
Functions
Functions
Retained
512 φosc clock cycles
Watch
Subactive Subsleep
Halted
Halted
Retained
Retained
Retained
Retained
Rev.3.00 Jul. 19, 2007 page 247 of 532
9. Timers
TCW overflow
Reset generated
Standby
Halted
Halted
Retained
Retained
Retained
Retained
REJ09B0397-0300

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