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Figure 10.9 shows a typical flow chart for SCI3 initialization.
Clear TE and RE to 0 in SCR3
1
Set bits CKE1 and CKE0
2
Select communication format in SMR
3
Set BRR value
Has a 1-bit
interval elapsed?
Set bits RIE, TIE, TEIE, and MPIE
4
in SCR3, and set TE or RE to 1
Figure 10.9 Typical Flow Chart when SCI3 Is Initialized
Start
Wait
Yes
End
10. Serial Communication Interface
1.
Select the clock in serial control register 3
(SCR3). Other bits must be cleared to 0.
If clock output is selected in asynchronous
mode, a clock signal will be output as soon
as CKE1 and CKE0 have been set.
If clock output is selected for reception in
synchronous mode, a clock signal will be
output as soon as bits CKE1 and CKE0,
and bit RE, are set to 1.
2.
Set the transmit/receive format in the serial
mode register (SMR).
3.
Set the bit rate register (BRR) to the value
giving the desired bit rate.
No
This step is not required when an external
clock source is used.
4.
Wait for at least a 1-bit interval, then set
bits RIE, TIE, TEIE, and MPIE, and set bit
TE or RE in SCR3 to 1. Setting TE or RE
enables SCI3 to use the TXD or RXD pin.
The initial states in asynchronous mode
are the mark transmit state and the idle
receive state (waiting for a start bit).
Rev.3.00 Jul. 19, 2007 page 287 of 532
REJ09B0397-0300
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