Renesas F-ZTAT H8 Series Hardware Manual page 329

Receiving Multiprocessor Data: Figure 10.23 shows a typical flow chart for receiving data using
a multiprocessor format. After SCI3 initialization, follow the procedure below.
Start
1 Set bit MPIE in SCR3 to 1
2 Read bits OER and FER in SSR
OER + FER = 1?
3 Read bit RDRF in SSR
RDRF = 1?
Read received data in RDR
Own ID?
Read bits OER and FER in SSR
OER + FER = 1?
4 Read bit RDRF in SSR
RDRF = 1?
Read received data in RDR
Continue receiving?
Clear bit RE in SCR3 to 0
End
Figure 10.23 Typical Flow Chart for Receiving Serial Data Using Multiprocessor Format
Yes
No
No
Yes
No
Yes
Yes
No
No
Yes
5 Error processing
Yes
No
A Start receive error processing
End receive error processing
10. Serial Communication Interface
1. Set bit MPIE in serial control register 3 (SCR3) to 1.
2. Read bits OER and FER in the serial status register (SSR)
to determine if an error has occurred. If a receive error has
occurred, receive error processing is executed.
3. Read the serial status register (SSR) and confirm that
RDRF = 1. If RDRF = 1, read the data in the received data
register (RDR) and compare it with the processor's own ID.
If the received data does not match the ID, set bit MPIE to
1 again. Bit RDRF is automatically cleared to 0 when data
in the received data register (RDR) is read.
4. Read SSR, check that bit RDRF = 1, then read received
data from the receive data register (RDR).
5. If a receive error occurs, read bits OER and FER in SSR
to determine which error occurred. After the necessary
error processing, be sure to clear the error flags to 0.
Serial data transfer cannot take place while
bit OER or FER is set to 1.
When a framing error occurs, a break can be detected by
reading the RXD pin value.
Yes
OER = 1?
No
Yes
FER = 1?
No
Clear bits OER and
FER in SSR to 0.
Rev.3.00 Jul. 19, 2007 page 303 of 532
Overrun error
processing
Yes
Break?
No
Framing error
processing
A
REJ09B0397-0300