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6. ROM
Increment
address
Notes:
1.
Prewriting (setting erase block data to all 1) is not necessary.
The values of x, y, z, α, β, γ, ε, η, and N are shown in section 15.2.6, Flash Memory Characteristics.
2.
3.
Verify data is read in 16-bit (word) units.
4.
Set only one bit in EBR; two or more bits must not be set.
5.
Erasing is performed in block units. To erase multiple blocks, each block must be erased in turn.
Figure 6.13 Erase/Erase-Verify Flowchart (Single-Block Erase)
Rev.3.00 Jul. 19, 2007 page 144 of 532
REJ09B0397-0300
START
1
*
Set SWE bit in FLMCR1
Wait (x) μs
n = 1
Set EBR
Enable WDT
Set ESU bit in FLMCR2
Wait (y) μs
Set E bit in FLMCR1
Wait (z) ms
Clear E bit in FLMCR1
Wait (α) μs
Clear ESU bit in FLMCR2
Wait (β) μs
Disable WDT
Set EV bit in FLMCR1
Wait (γ) μs
Set block start address
as verify address
H'FF dummy write to verify address
Wait (ε) μs
Read verify data
No
Verify data =
all 1?
Yes
No
Last address
of block?
Yes
Clear EV bit in FLMCR1
Wait (η) μs
5
*
No
End of erasing of
all erase blocks?
Yes
Clear SWE bit in FLMCR1
End of erasing
2
*
4
*
2
*
Start of erase
2
*
Erase halted
2
*
2
*
2
*
2
*
3
*
Clear EV bit in FLMCR1
Wait (η) μs
2
*
n ≥ N?
Yes
Clear SWE bit in FLMCR1
Erase failure
n ← n + 1
2
*
2
*
No
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