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TMC—Timer mode register C
Bit
TMC7
Initial value
Read/Write
R/W
Auto-reload function select
0 Interval timer function selected
1 Auto-reload function selected
Legend:
*
Don't care
TCC—Timer counter C
Bit
TCC7
Initial value
Read/Write
R
7
6
5
TMC6
TMC5
0
0
0
R/W
R/W
Clock select
Counter up/down control
0 0
1
1 *
7
6
5
TCC6
TCC5
0
0
0
R
R
4
3
⎯
⎯
1
1
⎯
⎯
0
0 0
Internal clock:
1
Internal clock:
1 0
Internal clock:
1
Internal clock:
1 0 0
Internal clock:
1
Internal clock:
1 0
Internal clock:
1
External event (TMIC):
TCC is an up-counter
TCC is a down-counter
TCC up/down operation is hardware-controlled by
input at the UD pin. TCC is a down-counter if the UD
input is high, and an up-counter if the UD input is low.
4
3
TCC4
TCC3
0
0
R
R
Count value
Rev.3.00 Jul. 19, 2007 page 485 of 532
Appendix B Internal I/O Registers
H'B4
(H8/3857 Group only)
2
1
TMC2
TMC1
0
0
R/W
R/W
φ/8192
φ/2048
φ/512
φ/64
φ/16
φ/4
φ /4
W
Rising or falling edge
H'B5
(H8/3857 Group only)
2
1
TCC2
TCC1
0
0
R
R
REJ09B0397-0300
Timer C
0
TMC0
0
R/W
Timer C
0
TCC0
0
R
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