Renesas F-ZTAT H8 Series Hardware Manual page 28

8-bit single-chip microcomputer
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1. Overview
Table 1.1
Features
Item
CPU
Interrupts
Clock pulse generators Two on-chip clock pulse generators
Power-down modes
Rev.3.00 Jul. 19, 2007 page 2 of 532
REJ09B0397-0300
Description
High-speed H8/300L CPU
General-register architecture
General registers: Sixteen 8-bit registers (can be used as eight 16-bit
registers)
Operating speed
⎯ Max. operating speed: 5 MHz
⎯ Add/subtract: 0.4 μs (operating at 5 MHz)
⎯ Multiply/divide: 2.8 μs (operating at 5 MHz)
⎯ Can run on 32.768 kHz subclock
Instruction set compatible with H8/300 CPU
⎯ Instruction length of 2 bytes or 4 bytes
⎯ Basic arithmetic operations between registers
⎯ MOV instruction for data transfer between memory and registers
Typical instructions
Multiply (8 bits × 8 bits)
Divide (16 bits ÷ 8 bits)
Bit accumulator
Register-indirect designation of bit position
H8/3857 Group: 29 interrupt sources
13 external interrupt sources: IRQ
16 internal interrupt sources
H8/3854 Group: 26 interrupt sources
12 external interrupt sources: IRQ
14 internal interrupt sources
System clock pulse generator: 1 to 10 MHz
Subclock pulse generator: 32.768 kHz
Six power-down modes
Sleep mode
Standby mode
Watch mode
Subsleep mode
Subactive mode
Active (medium-speed) mode
to IRQ
, WKP
to WKP
4
0
7
, IRQ
, IRQ
, IRQ
, WKP
4
3
1
0
0
to WKP
7
0

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