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8. I/O Ports
8.8.2
Register Configuration and Description
Table 8.20 shows the port A register configuration.
Table 8.20 Port A Registers
Name
Port data register A
Port control register A
Port Data Register A (PDRA)
Bit
Initial value
Read/Write
PDRA is an 8-bit register that stores data for port A pins PA
bits are set to 1, the values stored in PDRA are read. If port A is read while PCRA bits are cleared
to 0, the pin states are read.
Upon reset, PDRA is initialized to H'F0.
Port Control Register A (PCRA)
Bit
Initial value
Read/Write
PCRA is an 8-bit register for controlling whether each of the port A pins PA
an input or output pin. Setting a PCRA bit to 1 makes the corresponding pin an output pin, while
clearing the bit to 0 makes the pin an input pin.
Upon reset, PCRA is initialized to H'F0.
PCRA is a write-only register. All bits are read as 1.
Rev.3.00 Jul. 19, 2007 page 204 of 532
REJ09B0397-0300
Abbr.
PDRA
PCRA
7
6
5
⎯
⎯
⎯
1
1
1
⎯
⎯
⎯
7
6
5
⎯
⎯
⎯
1
1
1
⎯
⎯
⎯
R/W
Initial Value
R/W
H'F0
W
H'F0
4
3
⎯
PA
3
1
0
⎯
R/W
to PA
. If port A is read while PCRA
3
0
4
3
⎯
PCRA
PCRA
3
1
0
⎯
W
Address
H'FFDD
H'FFED
2
1
PA
PA
PA
2
1
0
0
R/W
R/W
R/W
2
1
PCRA
PCRA
2
1
0
0
W
W
to PA
functions as
3
0
0
0
0
0
0
0
W
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