Renesas M16C/60 Series Hardware Manual page 115

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M16C/6N5 Group
Count start flag
b7 b6 b5 b4 b3 b2
Up/down flag (Note 1)
b7 b6 b5 b4 b3 b2
Note 1: Use MOV instruction to write to this register.
Note 2: Make sure the port direction bits for the TA2
"0" (input mode).
Note 3: When not using the two-phase pulse signal processing function, set the corresponding bit to timer
A2 to timer A4 to "0".
Figure 1.13.5 TABSR Register and UFD Register
Rev.1.00 2003.05.30 page 101
b1 b0
Symbol Address
TABSR
Bit symbol
TA0S Timer A0 count start flag
TA1S Timer A1 count start flag
TA2S Timer A2 count start flag
TA3S Timer A3 count start flag
TA4S Timer A4 count start flag
TB0S Timer B0 count start flag
TB1S Timer B1 count start flag
TB2S Timer B2 count start flag
b1 b0
Symbol
UDF
Bit symbol
Timer A0 up/down flag
TA0UD
TA1UD
Timer A1 up/down flag
TA2UD
Timer A2 up/down flag
TA3UD
Timer A3 up/down flag
Timer A4 up/down flag
TA4UD
Timer A2 two-phase pulse
TA2P
signal processing select bit
TA3P
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
TA4P
signal processing select bit
After reset
0380 00
16 16
Bit name
0 : Stops counting
1 : Starts counting
Address After reset
0384 00
16 16
Bit name
0 : Down count
1 : Up count
Enabled by setting the TAiMR
register's MR2 bit to "0"
(switching source in UDF register)
during event counter mode.
0 : two-phase pulse signal
processing disabled
1 : two-phase pulse signal
processing enabled
to TA4 and TA2
IN IN
Function RW
RW
RW
RW
RW
RW
RW
RW
RW
Function
RW
RW
RW
RW
RW
RW
WO
WO
(Notes 2, 3)
WO
to TA4 pins are set to
OUT OUT
Timer A