Hardware Interrupts - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

Hardware Interrupts

Hardware interrupts are classified into two types — special interrupts and peripheral function interrupts.
(1) Special Interrupts
Special interrupts are non-maskable interrupts.
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• NMI Interrupt
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An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details,
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refer to "NMI Interrupt".
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• DBC Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development support
tools.
• Watchdog Timer Interrupt
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize
the watchdog timer. For details about the watchdog timer, refer to "Watchdog Timer".
• Oscillation Stop and Re-oscillation Detection Interrupt
Generated by the oscillation stop and re-oscillation detection function. For details about the oscillation
stop and re-oscillation detection function, refer to "Clock Generation Circuit".
• Single-step Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development support
tools.
• Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMAD0 to RMAD3 registers that corresponds to one of the AIER register's AIER0 or
AIER1 bit or the AIER2 register's AIER20 or AIER21 bit which is "1" (address match interrupt
enabled). For details, refer to "Address Match Interrupt".
(2) Peripheral Function Interrupts
Peripheral function interrupts are maskable interrupts and generated by the microcomputer's internal
functions. The interrupt sources for peripheral function interrupts are listed in "Table 1.10.2
Relocatable Vector Tables".
For details about the peripheral functions, refer to the description of each peripheral function in this
manual.
Rev.1.00 2003.05.30 page 69
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Interrupts