Renesas M16C/60 Series Hardware Manual page 140

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M16C/6N5 Group
Three-phase output buffer register i (i = 0, 1) (Note)
b7 b6 b5 b4 b3 b2 b1 b0
Note: The IDB0 and IDB1 register values are transferred to the three-phase output shift register by a transfer trigger.
The value written to the IDB0 register after a transfer trigger generates the output signal of each phase, and the
next value written to the IDB1 register at the falling edge of the timer A1, A2 or A4 one-shot pulse represents the
output signal of each phase.
Dead time timer (Notes 1, 2)
b7
Note 1: Use MOV instruction to write to this register.
Note 2: Effective when the INV15 bit is "0" (dead time timer enabled). If the INV15 bit is "1", the dead time timer is disabled
and has no effect.
Figure 1.14.4 IDB0 Register, IDB1 Register and DTT Register
Rev.1.00 2003.05.30 page 126
Symbol
IDB0
IDB1
Bit name
Bit Symbol
DUi U phase output buffer i
DUBi U phase output buffer i
DVi V phase output buffer i
DVBi V phase output buffer i
DWi W phase output buffer i
DWBi W phase output buffer i
Nothing is assigned. When write, set to "0".
(b7-b6) When read, its content is "0".
b0
Symbol
DTT
Function
Assuming the set value = n, upon a start trigger the
timer starts counting the count source selected by
the INV12 bit and stops after counting it n times.
The positive or negative phase whichever is going from
an inactive to an active level changes at the same
time the dead time timer stops.
Three-phase Motor Control Timer Function
Address After reset
01CA 00
16 16
01CB 00
16 16
Function
Write the output level
0: Active level
1: Inactive level
When read, these bits show the
three-phase output shift register
value.
Address After reset
01CC Indeterminate
16
1 to 255
RW
RW
RW
RW
RW
RW
RW
Setting range
RW
WO