Timers - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

Timers

Eleven 16-bit timers, each capable of operating independently of the others, can be classified by function
as either timer A (five) and timer B (six). The count source for each timer acts as a clock, to control such
timer operations as counting, reloading, etc.
Figures 1.13.1 and 1.13.2 show block diagrams of timer A and timer B configuration, respectively.
Main clock
f
1
PLL clock
Ring oscillator
clock
f f f f
8 32
1 or 2
TA0
IN
TA1
IN
TA2
IN
TA3
IN
TA4
IN
Note: Be aware that TA0
Figure 1.13.1 Timer A Configuration
Rev.1.00 2003.05.30 page 97
f
2
PCLK0 bit = 0
1/2
f f
1 or
PCLK0 bit = 1
f
1/8 8
f
1/4 32
f
C32
Noise
filter
Noise
filter
Noise
filter
Noise
filter
Noise
filter
Timer B2 overflow or underflow
shares the pin with RxD
IN 2
Clock prescaler
2
X
CIN
Set the CPSR bit of CPSRF
register to "1" (= prescaler
reset)
Timer mode
One-shot timer mod e
Pulse Width Measuring (PWM) mode
Timer A0
Event counter mod e
Timer mode
One-shot timer mod e
PWM mode
Timer A1
Event counter mod e
Timer mode
One-shot timer mod e
PWM mode
Timer A2
Event counter mod e
Timer mod e
One-shot timer mod e
PWM mode
Timer A3
Event counter mod e
Timer mode
One-shot timer mod e
PWM mode
Timer A4
Event counter mod e
, SCL and TB5 .
2 IN
f
1/32 C32
Reset
Timer A0 interrupt
Timer A1 interrupt
Timer A2 interrupt
Timer A3 interrupt
Timer A4 interrupt
Timers