Renesas M16C/60 Series Hardware Manual page 41

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
Processor mode register 0 (Note 1)
b7 b6 b5 b4 b3 b2
Note 1: Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
Note 2: The PM01 to PM00 bits do not change at software reset, watchdog timer reset and oscillation stop detection
reset.
Note 3: Effective when the PM01 to PM00 bits are set to "01
mode).
Note 4: To set the PM01 to PM00 bits are "01
the entire CS space), apply an "H" signal to the BYTE pin (external data bus is 8-bit width).
While the CNV
If the PM05 to PM04 bits are set to "11
become I/O ports, in which case the accessible area for each CS is 256 bytes.
Figure 1.6.1 PM0 Register
Rev.1.00 2003.05.30 page 27
b1 b0
Symbol
PM0
Bit symbol
PM00
Processor mode bit
PM01
R/W mode select bit
PM02
PM03
Software reset bit
PM04
Multiplexed bus space
select bit
PM05
Port P4
PM06
select bit
BCLK output disable bit
PM07
" and the PM05 to PM04 bits are "11
2
pin is held "H" (V ), do not rewrite the PM05 to PM04 bits to "11
SS CC1
" during memory expansion mode, P3
2
Address After reset (Note 2)
0004 00000000
16
00000011
Bit name
b1 b0
0 0 : Single-chip mode
0 1 : Memory expansion mode
(Note 2) 1 0 : Must not be set
1 1 : Microprocessor mode
0 : RD, BHE, WR
(Note 3) 1 : RD, WRH, WRL
Setting this bit to "1" resets the
microcomputer. When read, its
.
content is "0"
b5 b4
0 0 : Multiplexed bus is unused
(Separate bus in the entire CS space)
0 1 : Allocated to CS
(Note 3)
1 0 : Allocated to CS
1 1 : Allocated to the entire CS space (Note 4)
0 : Address output
to P4 function
0 3
1 : Port function
(Note 3)
(Address is not output)
0 : BCLK is output
1 : BCLK is not output
(Note 3)
(Pin is left high-impedance)
" (memory expansion mode) or "11
2
Processor Mode
(CNV pin = L)
2 SS
(CNV pin = H)
2 SS
Function
RW
RW
RW
RW
RW
RW
space
2
space
1
RW
RW
RW
" (microprocessor
2
" (multiplexed bus assigned to
2
" after reset.
2
to P3 and P4 to P4
1 7 0 3