Renesas M16C/60 Series Hardware Manual page 192

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M16C/6N5 Group
SI/O3 control register (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
Note 1: Make sure this register is written to by the next instruction after setting the PRCR register's PRC2 bit to "1" (write
enabled).
Note 2: When the SM32 bit is set to "1", the target pin goes to a high-impedance state regardless of which function of the
pin is being used.
Note 3: Set the SM33 bit to "1" and the corresponding port direction bit to "0" (input mode).
Note 4: Set the SM33 bit to "1" (S
SI/O3 bit rate generator (Notes 1, 2)
b7
Note 1: Write to this register while serial I/O is neither transmitting nor receiving.
Note 2: Use MOV instruction to write to this register.
SI/O3 transmit/receive register (Notes 1, 2)
b7
Note 1: Write to this register while serial I/O is neither transmitting nor receiving.
Note 2: To receive data, set the corresponding port direction bit for S
Figure 1.15.35 S3C Register, S3BRG Register and S3TRR Register
Rev.1.00 2003.05.30 page 178
Symbol Address
S3C 01E2
Bit
Bit name
symbol
SM30
Internal synchronous
clock select bit
SM31
S output disable bit
OUT3
SM32
(Note 2)
S I/O3 port select bit
SM33
SM34
CLK polarity select bit
Transfer direction select
SM35
bit
Synchronous clock
SM36
select bit
S initial value set bit
SM37
OUT3
output, CLK function).
OUT3 3
b0
Symbol
S3BRG
Description
Assuming that set value = n, S3BRG divides the count
source by n + 1
b0
Symbol
S3TRR
Transmission/reception starts by writing transmit data to this register.
After transmission/reception finishes, reception data can be read by reading this register.
After reset
0100000
16 16
Description
b1 b0
0 0 : Selecting f or f
1SIO 2SIO
0 1 : Selecting f
8SIO
1 0 : Selecting f
32SIO
1 1 : Must not be set
0 : S output
OUT3
1 : S output disabled (high-impedance)
OUT3
0 : Input/output port
1 : S output, CLK function
OUT3 3
0 : Transmit data is output at falling edge of
transfer clock and receive data is input
at rising edge
1 : Transmit data is output at rising edge of
transfer clock and receive data is input
at falling edge
0 : LSB first
1 : MSB first
0 : External clock (Note 3)
1 : Internal clock (Note 4)
Effective when SM33 = 0
0 : "L" output
1 : "H" output
After
Address reset
01E3 Indeterminate
16
After reset
Address
01E0 Indeterminate
16
Description
to "0" (input mode).
IN3
SI/O3
RW
RW
RW
RW
RW
RW
RW
RW
RW
Setting range
RW
WO
00 to FF
16 16
RW
RW