Precaution For Serial I/O (Special Modes); Special Mode 2; Special Mode 4 (Sim Mode) - Renesas M16C/60 Series Hardware Manual

Hide thumbs Also See for M16C/60 Series:
Table of Contents

Advertisement

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group

1.9 Precaution for Serial I/O (Special Modes)

1.9.1 Special Mode 2

If a low-level signal is applied to the NMI pin when the TB2SC register IVPCR1 bit = 1 (three-phase
output forcible cutoff by input on NMI pin enabled), the RTS

1.9.2 Special Mode 4 (SIM Mode)

A transmit interrupt request is generated by setting the U2C1 register U2IRS bit to "1" (transmission
complete) and U2ERE bit to "1" (error signal output) after reset. Therefore, when using SIM mode, be
sure to set the IR bit to "0" (no interrupt request) after setting these bits.
Rev.1.00
2003.05.30
page 15
_______
_______
1.9 Precautions for Serial I/O (Special Modes)
and CLK
pins go to a high-impedance state.
2
2

Advertisement

Table of Contents
loading

This manual is also suitable for:

M16c/6n5

Table of Contents