Renesas M16C/60 Series Hardware Manual page 152

Under development
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M16C/6N5 Group
UARTj transmit/receive control register 1 (j = 0, 1)
b7 b6 b5 b4 b3 b2 b1
UART2 transmit/receive control register 1
b7 b6 b5 b4 b3 b2 b1
Figure 1.15.5 U0C1 to U2C1 Registers
Rev.1.00 2003.05.30 page 138
b0 Symbol
U0C1, U1C1 03A5
Bit
Bit name
symbol
TE
Transmit enable bit
Transmit buffer empty
TI
flag
RE Receive enable bit
RI Receive complete flag
Nothing is assigned. When write, set to "0".
(b5-b4) When read, these contents are "0".
UjLCH
Data logic select bit
Error signal output
UjERE
enable bit
b0
Symbol
U2C1
Bit
Bit name
symbol
TE Transmit enable bit
Transmit buffer empty
TI
flag
RE Receive enable bit
RI Receive complete flag
UART2 transmit interrupt
U2IRS
cause select bit
UART2 continuous
U2RRM
receive mode enable bit
Data logic select bit
U2LCH
Error signal output
U2ERE
enable bit
Address After reset
,03AD 00000010
16 16 2
Function
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in UjTB register
1 : No data present in UjTB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in UjRB register
1 : Data present in UjRB register
0 : No reverse
1 : Reverse
0 : Output disabled
1 : Output enabled
Address After reset
01FD 00000010
16 2
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in U2TB register
1 : No data present in U2TB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in U2RB register
1 : Data present in U2RB register
0 : Transmit buffer empty (TI = 1)
1 : Transmit is completed (TXEPT = 1)
0 : Continuous receive mode disabled
1 : Continuous receive mode enabled
0 : No reverse
1 : Reverse
0 : Output disabled
1 : Output enabled
Function
Serial I/O
RW
RW
RO
RW
RO
RW
RW
RW
RW
RO
RW
RO
RW
RW
RW
RW