Read And Write Signals; Ale Signal - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

(4) Read and Write Signals

When the data bus is 16-bit width, the read and write signals can be chosen to be a combination of RD,
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WR and BHE or a combination of RD, WRL and WRH by using the PM02 bit in the PM0 register. When
the data bus is 8-bit width, use a combination of RD, WR and BHE.
Table 1.7.2 shows the operation of RD, WRL, and WRH signals. Table 1.7.3 shows the operation of RD,
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WR, and BHE signals.
Table 1.7.2 Operation of RD, WRL and WRH Signals
Data bus width
16 bits
(BYTE pin
input = L)
Table 1.7.3 Operation of RD, WR and BHE Signals
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Data bus width RD
16 bits
(BYTE pin
input = L)
8 bits
(BYTE pin input = H)
Note: Do not use.

(5) ALE Signal

The ALE signal latches the address when accessing the multiplexed bus space. Latch the address when
the ALE signal falls. Figure 1.7.3 shows the ALE signal, address bus and data bus.
When BYTE pin input = H
ALE
A /D to A /D
0 0 7 7
A to A
8 19
Note: If the entire CS space is assigned a multiplexed bus, these pins function as I/O ports.
Figure 1.7.3 ALE Signal, Address Bus, Data Bus
Rev.1.00 2003.05.30 page 34
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_____ ________ _________
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RD WRL
L H
H L
H H
H L
_____ ______ ________
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WR BHE
H L L
L H L
H L H
L H H
H L L
L H L
H L - (Note)
L H - (Note)
Address Data
Address (Note)
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_____ ______ ________
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_________
WRH Status of external data bus
H Read data
H Write 1 byte of data to an even address
L Write 1 byte of data to an odd address
Write data to both even and odd addresses
L
Status of external data bus
A
0
H Write 1 byte of data to an odd address
H Read 1 byte of data from an odd address
L Write 1 byte of data to an even address
L Read 1 byte of data from an even address
L Write data to both even and odd addresses
L Read data from both even and odd addresses
Write 1 byte of data
H to L
H to L Read 1 byte of data
When BYTE pin input = L
ALE
A
0
Address
A /D to A /D
1 0 8 7
A to A
9 19
Bus Control
_____
_____
Address
Data
Address