Dma Enable; Dma Request - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

3. DMA Enable

When a data transfer starts after setting the DMAE bit of the DMiCON register (i = 0, 1) to "1" (enabled),
the DMAC operates as follows:
(1) Reload the forward address pointer with the SARi register value when the DSD bit of the DMiCON
register is "1" (forward) or the DARi register value when the DAD bit of the DMiCON register is "1" (forward).
(2) Reload the DMAi transfer counter with the DMAi transfer counter reload register value.
If the DMAE bit is set to "1" again while it remains set, the DMAC performs the above operation.
However, if a DMA request may occur simultaneously when the DMAE bit is being written, follow the
steps below.
Step 1: Write "1" to the DMAE bit and DMAS bit of the DMiCON register simultaneously.
Step 2: Make sure that the DMAi is in an initial state as described above (1) and (2) in a program.
If the DMAi is not in an initial state, the above steps should be repeated.

4. DMA Request

The DMAC can generate a DMA request as triggered by the cause of request that is selected with the
DMS and DSEL3 to DSEL0 bits of the DMiSL register (i = 0, 1) on either channel. Table 1.12.4 shows the
timing at which the DMAS bit changes state.
Whenever a DMA request is generated, the DMAS bit is set to "1" (DMA requested) regardless of whether
or not the DMAE bit is set. If the DMAE bit was set to "1" (enabled) when this occurred, the DMAS bit is
set to "0" (DMA not requested) immediately before a data transfer starts. This bit cannot be set to "1" in
a program (it can only be set to "0").
The DMAS bit may be set to "1" when the DMS or the DSEL3 to DSEL0 bits change state. Therefore,
always be sure to set the DMAS bit to "0" after changing the DMS or the DSEL3 to DSEL0 bits.
Because if the DMAE bit is "1", a data transfer starts immediately after a DMA request is generated, the
DMAS bit in almost all cases is "0" when read in a program. Read the DMAE bit to determine whether the
DMAC is enabled.
Table 1.12.4 Timing at Which DMAS bit Changes State
DMA factor
Software trigger
Peripheral function
i = 0, 1
Rev.1.00 2003.05.30 page 95
Timing at which the bit is set to "1"
When the DSR bit of the DMiSL register • Immediately before a data transfer starts
is set to "1"
When the interrupt control register for
the peripheral function that is selected
by the DSEL3 to DSEL0 and DMS bits
of the DMiSL register has its IR bit set to "1".
DMAS bit of DMiCON register
Timing at which the bit is set to "0"
• When set by writing "0" in a program
DMAC