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M16C/6N5 Group
1.14 Precautions for Flash Memory Version
1.14.1 Precautions for Functions to Prevent Flash Memory from Rewriting
ID codes are stored in addresses 0FFFDF
and 0FFFFB
. If wrong data are written to theses addresses, the flash memory cannot be read or
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written in standard serial I/O mode and CAN I/O mode.
The ROMCP register is mapped in address 0FFFFF
memory cannot be read or written in parallel I/O mode.
In the flash memory version of microcomputer, these addresses are allocated to the vector addresses
(H) of fixed vectors.
1.14.2 Precautions for Stop Mode
When shifting to stop mode, the following settings are required:
• Set the FMR01 bit to "0" (CPU rewrite mode disabled) and disable DMA transfers before setting the
CM10 bit to "1" (stop mode).
• Execute the JMP.B instruction subsequent to the instruction which sets the CM10 bit to "1" (stop
mode)
Example program
1.14.3 Precautions for Wait Mode
When shifting to wait mode, set the FMR01 bit to "0" (CPU rewrite mode disabled) before executing
the WAIT instruction.
1.14.4 Precautions for Low Power Dissipation Mode and Ring Oscillator Low Power Dissipation Mode
If the CM05 bit is set to "1" (main clock stop), the following commands must not be executed.
• Program
• Block erase
• Erase all unlocked blocks
• Lock bit program
1.14.5 Writing command and data
Write the command code and data at even addresses.
1.14.6 Precautions for Program Command
Write "xx40
" in the first bus cycle and write data to the write address in the second bus cycle, and an
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auto program operation (data program and verify) will start. Make sure the address value specified in
the first bus cycle is the same even address as the write address specified in the second bus cycle.
1.14.7 Precautions for Lock Bit Program Command
Write "xx77
" in the first bus cycle and write "xxD0
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address, however) in the second bus cycle, and the lock bit for the specified block is set to "0".
Make sure the address value specified in the first bus cycle is the same uppermost block address that
is specified in the second bus cycle.
Rev.1.00
2003.05.30
page 23
BSET
0, CM1
JMP.B
L1
L1:
Program after returning from stop mode
1.14 Precautions for Flash Memory Version
, 0FFFE3
, 0FFFEB
, 0FFFEF
16
16
16
. If wrong data is written to this address, the flash
16
; Stop mode
" to the uppermost address of a block (even
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, 0FFFF3
, 0FFFF7
,
16
16
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