Timer A - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

Timer A

Figure 1.13.3 shows a block diagram of the timer A. Figures 1.13.4 to 1.13.6 show the timer A-related
registers.
The timer A supports the following four modes. Except in event counter mode, timers A0 to A4 all have the
same function. Use the TMOD1 to TMOD0 bits of TAiMR register (i = 0 to 4) to select the desired mode.
• Timer mode: The timer counts an internal count source.
• Event counter mode: The timer counts pulses from an external device or overflows and underflows of other timers.
• One-shot timer mode: The timer outputs a pulse only once before it reaches the minimum count "0000
• Pulse width modulation (PWM) mode: The timer outputs pulses in a given width successively.
Clock source
selection
f or f
1 2
f
8
f
32
f
C32
Polarity
selection
TAi
IN
(Note)
TB2 overflow
(Note)
TAj overflow
TAk overflow
Pulse output
TAi
OUT
i = 0 to 4
j = i — 1. Note, however, that j = 4 when i = 0
k = i + 1. Note, however, that k = 0 when i = 4
Note: Overflow or underflow
Figure 1.13.3 Timer A Block Diagram
Rev.1.00 2003.05.30 page 99
Timer mode
One shot mode
PWM mode
Timer mode
(gate function)
Clock selection
Event counter mode
TABSR register
Clock selection
To external
trigger circuit
UDF register
Data bus high-order bits
Data bus low-order bits
Low-order
8 bits
Reload register
Counter
Up-count/down-count
Always counts down except
in event counter mode
TAi
Timer A0
Timer A1
Timer A2
Down count
Timer A3
Timer A4
Toggle flip-flop
High-order
8 bits
Addresses TAj TAk
-
0387 0386 Timer A4 Timer A1
16 16
0389 - 0388 Timer A0 Timer A2
16 16
038B - 038A Timer A1 Timer A3
16 16
038D - 038C Timer A2 Timer A4
16 16
038F - 038E Timer A3 Timer A0
16 16
Timer A
."
16