Renesas M16C/60 Series Hardware Manual page 249

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M16C/6N5 Group
Port Pi register (i = 0 to 7, 9, 10) (Note 1)
b7 b6 b5 b4 b3 b2
Note 1: During memory expansion and microprocessor modes, the Pi register for the pins functioning
as bus control pins (A
HOLD, HLDA and BCLK) cannot be modified.
Note 2: Since P7
1
Port P8 register
b7 b6 b5 b4 b3 b2
Figure 1.20.8 P0 to P10 Registers
Rev.1.00 2003.05.30 page 235
Symbol
b1 b0
P0 to P3
P4 to P7
P9, P10
Bit symbol
Pi_0 Port Pi
Pi_1 Port Pi
Pi_2 Port Pi
Pi_3 Port Pi
Pi_4 Port Pi
Pi_5 Port Pi
Pi_6 Port Pi
Pi_7 Port Pi
to A , D to D
0 19 0
and P9 are N channel open-drain ports, the data is high-impedance.
1
b1 b0
Symbol
P8
Bit symbol
P8_0 Port P8
P8_1 Port P8
Pi8_2 Port P8
P8_3 Port P8
P8_4 Port P8
P8_5 Port P8
P8_6 Port P8
P8_7 Port P8
Address
03E0 , 03E1 , 03E4
16 16 16
03E8 , 03E9 , 03EC
16 16 16
03F1 , 03F4
16 16
Bit name
bit The pin level on any I/O port which is set
0
for input mode can be read by reading
bit
1
the corresponding bit in this register.
bit
The pin level on any I/O port which is
2
set for output mode can be controlled
bit
3
by writing to the corresponding bit in
bit
4
this register.
0 : "L" level
bit
5
1 : "H" level (Note 2)
bit
6
(i = 0 to 7, 9, 10)
bit
7
, CS to CS , RD, WRL/WR, WRH/BHE, ALE, RDY,
15 0 3
Address
03F0
16
Bit name
bit The pin level on any I/O port which is set
0
for input mode can be read by reading
bit
1
the corresponding bit in this register.
bit
The pin level on any I/O port which is
2
set for output mode can be controlled
bit
3
by writing to the corresponding bit in
bit
4
this register. (Except for P8
0 : "L" level
bit
5
1 : "H" level
bit
6
bit
7
Programmable I/O Ports
After reset
, 03E5
Indeterminate
16
, 03ED
Indeterminate
16
Indeterminate
Function
After reset
Indeterminate
Function
.)
5
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RW
RW