Renesas M16C/60 Series Hardware Manual page 158

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
Table 1.15.3 lists the functions of the input/output pins during clock synchronous serial I/O mode. Table
1.15.3 shows pin functions for the case where the multiple transfer clock output pin select function is
deselected. Table 1.15.4 lists the P6
Note that for a period from when the UARTi operation mode is selected to when transfer starts, the TxD
pin outputs an "H". (If the N channel open-drain output is selected, this pin is in a high-impedance state.)
Figure 1.15.9 shows the transmit/receive timings during clock synchronous serial I/O mode.
Table 1.15.3 Pin Functions (When Not Select Multiple Transfer Clock Output Pin Function)
Pin name
TxD Serial data output
i
(P6 , P6 , P7 )
3 7 0
RxD Serial data input
i
(P6 , P6 , P7 )
2 6 1
CLK
Transfer clock output
i
(P6 , P6 , P7 )
Transfer clock input
1 5 2
_________________ ________
CTS /RTS
CTS input
i i
(P6 , P6 , P7 )
0 4 3
________
RTS output
I/O port
Table 1.15.4 P6 Pin Functions
4
Pin function
CRD
P6
4
_________
CTS
1
_________
RTS
1
_________
CTS (Note 1)
0
CLKS
1
Note 1: In addition to this, set the U0C0 register's CRD bit to "0" (CTS
register's CRS bit to "1" (RTS
Note 2: When the CLKMD1 bit = 1 and the CLKMD0 bit = 0, the following logic levels are output:
• High if the U1C0 register's CLKPOL bit = 0
• Low if the U1C0 register's CLKPOL bit = 1
Rev.1.00 2003.05.30 page 144
pin functions during clock synchronous serial I/O mode.
4
Function
(Outputs dummy data when performing reception only)
PD6 register's PD6_2 bit = 0, PD6_6 bit = 0
PD7 register's PD7_1 bit = 0
(Can be used as an input port when performing transmission only)
UiMR register's CKDIR bit = 0
UiMR register's CKDIR bit = 1
PD6 register's PD6_1 bit = 0, PD6_5 bit = 0
PD7 register's PD7_2 bit = 0
UiC0 register's CRD bit = 0
UiC0 register's CRS bit = 0
PD6 register's PD6_0 bit = 0, PD6_4 bit = 0
PD7 register's PD7_3 bit = 0
UiC0 register's CRD bit = 0
UiC0 register's CRS bit = 1
UiC0 register's CRD bit = 1
U1C0 register
CRS RCSP
1 -
0 0
0 1
0 0
- -
_________
selected).
0
Serial I/O (Clock Synchronous Serial I/O Mode)
Method of selection
Bit set value
UCON register
CLKMD1 CLKMD0
0 0
0 0
0 0
1 0
- 1 (Note 2)
_________ _________
PD6 register
PD6_4
- Input: 0, Output: 1
- 0
- -
- 0
1 -
/RTS enabled) and the U0C0
0 0
i