Renesas M16C/60 Series Hardware Manual page 70

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
• Ring Oscillator Mode
The ring oscillator clock divided by 1 (undivided), 2, 4, 8 or 16 provides the CPU clock. The ring
oscillator clock is also the clock source for the peripheral function clocks. If the sub clock is activated,
f can be used as the count source for timers A and B.
C32
• Ring Oscillator Low Power Dissipation Mode
The main clock is turned off after being placed in ring oscillator mode. The CPU clock can be selected
like in the ring oscillator mode. The ring oscillator clock is the clock source for the peripheral function
clocks. If the sub clock is activated, f
operation mode is returned to the high- and medium-speed modes, set the CM06 bit to "1" (divide-by-
8 mode).
Table 1.8.3 lists the setting clock related bit and modes
Table 1.8.3 Setting Clock Related Bit and Modes
CM2 register
Modes
PLL operation mode
High-speed mode
Medium- divided by 2
speed divided by 4
mode divided by 8
divided by 16
Low-speed mode
Low power
dissipation mode
Ring divided by 1
oscillator divided by 2
mode divided by 4
divided by 8
divided by 16
Ring oscillator
low power dissipation
mode
Note 1: When the CM05 bit is set to "1" (main clock turned off) in low-speed mode, the mode goes to low
power dissipation mode and CM06 bit is set to "1" (divide-by-8 mode) simultaneously.
Note 2: The divide-by-n value can be selected the same way as in ring oscillator mode.
Rev.1.00 2003.05.30 page 56
can be used as the count source for timers A and B. When the
C32
CM1 register
CM21 CM11 CM17, CM16
0 1
0 0
0 0
0 0
0 0
0 0
- -
- -
1 -
1 -
1 -
1 -
1 -
1 - (Note 2)
CM07 CM06
00 0
2
00 0
2
01 0
2
10 0
2
- 0
11 0
2
- 1
- 1
(Note 1)
00 0
2
01 0
2
10 0
2
- 0
11 0
2
0 (Note 2)
Clock Generation Circuit
CM0 register
CM05 CM04
0 0
0 0
0 0
0 0
1 0
0 0
- 0 1
1 1 1
(Note 1)
0 0
0 0
0 0
1 0
0 0
1
-
-
-
-
-
-
-
-
-
-
-
-