Renesas M16C/60 Series Hardware Manual page 135

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M16C/6N5 Group
Count source
Measurement pulse
Reload register counter
transfer timing
Timing at which counter
reaches "0000 "
16
TBiS bit
TBiIC register's
IR bit
TBiMR register's
MR3 bit
The TB0S to TB2S bits are assigned to the TABSR register's bit 5 to bit 7, and the TB3S to TB5S bits
are assigned to the TBSR register's bit 5 to bit 7.
i = 0 to 5
Note 1: Counter is initialized at completion of measurement.
Note 2: Timer has overflown.
Note 3: This timing diagram is for the case where the TBiMR register's MR1 to MR0 bits are "00
from falling edge to falling edge of the measurement pulse).
Figure 1.13.21 Operation Timing When Measuring Pulse Period
Count source
Measurement pulse
Reload register
transfer timing
Timing at which counter
reaches "0000 "
16
TBiS bit
TBiIC register's
IR bit
TBiMR register's
MR3 bit
The TB0S to TB2S bits are assigned to the TABSR register's bit 5 to bit 7, and the TB3S to TB5S bits
are assigned to the TBSR register's bit 5 to bit 7.
i = 0 to 5
Note 1: Counter is initialized at completion of measurement.
Note 2: Timer has overflown.
Note 3: This timing diagram is for the case where the TBiMR register's MR1 to MR0 bits are "10
from a falling edge to the next rising edge and the interval from a rising edge to the next falling edge of the
measurement pulse).
Figure 1.13.22 Operation Timing When Measuring Pulse Width
Rev.1.00 2003.05.30 page 121
"H"
"L"
"1"
"0"
"1"
"0"
Set to "0" upon accepting an interrupt request or by writing in program
"1"
"0"
"H"
"L"
Transfer
(indeterminate
value)
counter
(Note 1)
"1"
"0"
"1"
"0"
Set to "0" upon accepting an interrupt request or by
"1" writing in program
"0"
Transfer Transfer
(indeterminate value) (measured value)
(Note 1) (Note 1)
" (measure the interval
2
Transfer Transfer
Transfer
(measured value) (measured value)
(measured
value)
(Note 1) (Note 1) (Note 1)
" (measure the interval
2
Timer B
(Note 2)
(Note 2)