Renesas M16C/60 Series Hardware Manual page 324

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M16C/6N5 Group
1.7.1.3 Timer A (One-shot Timer Mode)
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the
TAiMR (i = 0 to 4) register, the TAi register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register before setting the TAiS bit in the TABSR register to "1" (count starts).
Always make sure the TAiMR register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register are modified while the TAiS bit remains "0" (count stops) regardless whether after
reset or not.
2. When setting the TAiS bit of the TABSR register to "0" (count stop), the followings occur:
• A counter stops counting and a content of reload register is reloaded.
• TAi
pin outputs "L".
OUT
• After one cycle of the CPU clock, the IR bit of the TAiIC register is set to "1" (interrupt request).
3. Output in one-shot timer mode synchronizes with a count source internally generated. When an
external trigger has been selected, one-cycle delay of a count source as maximum occurs
between a trigger input to TAi
4. The IR bit is set to "1" when timer operation mode is set with any of the following procedures:
• Select one-shot timer mode after reset.
• Change an operation mode from timer mode to one-shot timer mode.
• Change an operation mode from event counter mode to one-shot timer mode.
To use the timer Ai interrupt (the IR bit), set the IR bit to "0" after the changes listed above have
been made.
5. When a trigger occurs, while counting, a counter reloads the reload register to continue counting
after generating a re-trigger and counting down once. To generate a trigger while counting, generate
a second trigger between occurring the previous trigger and operating longer than one cycle of a
timer count source.
6.
If a low-level signal is applied to the NMI pin when the IVPCR1 bit = 1 (three-phase output forcible
cutoff by input on NMI pin enabled) of the TB2SC register, the TA1
to a high-impedance state.
Rev.1.00
2003.05.30
page 10
pin and output in one-shot timer mode.
IN
______
______
1.7 Precautions for Timers
, TA2
and TA4
pins go
OUT
OUT
OUT

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