Renesas M16C/60 Series Hardware Manual page 325

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
1.7.1.4 Timer A (Pulse Width Modulation Mode)
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the
TAiMR (i = 0 to 4) register, the TAi register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register before setting the TAiS bit in the TABSR register to "1" (count starts).
Always make sure the TAiMR register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register are modified while the TAiS bit remains "0" (count stops) regardless whether after
reset or not.
2. The IR bit is set to "1" when setting a timer operation mode with any of the following procedures:
• Select the PWM mode after reset.
• Change an operation mode from timer mode to PWM mode.
• Change an operation mode from event counter mode to PWM mode.
To use the timer Ai interrupt (the IR bit), set the IR bit to "0" by program after the above listed
changes have been made.
3. When setting TAiS bit to "0" (count stop) during PWM pulse output, the following action occurs:
• Stop counting.
• When TAi
• When TAi
4. If a low-level signal is applied to the NMI pin when the IVPCR1 bit = 1 (three-phase output forcible
cutoff by input on NMI pin enabled) of the TB2SC register, the TA1
to a high-impedance state.
Rev.1.00 2003.05.30 page 11
pin is output "H", output level is set to "L" and the IR bit is set to "1".
OUT
pin is output "L", both output level and the IR bit remain unchanged.
OUT
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1.7 Precautions for Timers
, TA2 and TA4 pins go
OUT OUT OUT