Renesas M16C/60 Series Hardware Manual page 148

Under development
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M16C/6N5 Group
Main clock, PLL clock, or ring oscillator clock
(UART0)
RxD
0
Clock source selection
f f
1SIO or 2SIO
01
f
8SIO
f
32SIO
CLK
0
CTS/RTS selected
CTS / RTS
0 0
CTS
0
(UART1)
RxD
1
Clock source selection
CLK1 to CLK0
f f
1SIO or 2SIO
01
f
8SIO
f
32SIO
CLK
1
reversing
CTS / RTS /
1 1
CTS / CLKS
0 1
(UART2)
RxD
2
Clock source selection
f f
1SIO or 2SIO
01
f
8SIO
f
32SIO
CLK
2
CTS / RTS
2 2
i = 0 to 2
n : Values set to the UiBRG register
i
SMD2 to SMD0, CKDIR: UiMR register's bits
CLK1 to CLK0, CKPOL, CRD, CRS: UiC0 register's bits
CLKMD0, CLKMD1, RCSP: UCON register's bits
Figure 1.15.1 UARTi Block Diagram
Rev.1.00 2003.05.30 page 134
RxD polarity
reversing circuit
1/16
CLK1 to CLK0
00 2
U0BRG
Internal
2 CKDIR=0 register
10
2
1 / (n +1)
0 1/16
External
CKDIR=1
1/2
Clock synchronous type
(when external clock is selected)
CKPOL
Clock synchronous type
(when internal clock is selected)
CLK
polarity
reversing
circuit
CTS/RTS disabled
CRS=1
CRS=0 "H"
CTS/RTS disabled
RCSP=0
CRD=1 CRD=1
CRD=0 CRD=0
from UART1
RCSP=1
RxD polarity
reversing circuit
1/16
00
2
U1BRG
Internal
2 CKDIR=0 register
10 2 UART transmission
1 / (n +1)
1 1/16
External
CKDIR=1
Clock synchronous type
(when internal clock is selected)
1/2
Clock synchronous type
(when external clock is selected)
CKPOL
Clock synchronous type
CLK
(when internal clock is selected)
polarity
CLKMD0=0
circuit
CLKMD0=1
Clock output
pin select
CTS/RTS selected
CTS/RTS disabled
CLKMD1=1
CRS=1
CLKMD1=0
CRS=0
"H"
CTS/RTS disabled
CRD=1
CRD=0
RxD polarity
reversing circuit
1/16
CLK1 to CLK0
00
2 U2BRG
register
2 Internal CKDIR=0
10
2
1 / (n +1)
2
1/16
External
CKDIR=1
1/2
Clock synchronous type
(when external clock is selected)
CKPOL
Clock synchronous type
CLK (when internal clock is selected)
polarity
reversing
circuit
CTS/RTS disabled
CTS/RTS
selected
RTS
CRS=1
CRS=0
"H"
CTS/RTS disabled
CRD=1
CTS
CRD=0
f PCLK1=0
2SIO
1/2 1/2
f
1SIO or
f
1SIO
PCLK1=1
1/8
f
8SIO
1/4
f
32SIO
UART reception
Reception
Clock synchronous
control circuit
type
UART transmission
Transmission control
Clock synchronous
circuit
type
Clock synchronous type
(when internal clock is selected)
CKDIR=0
CKDIR=1
RTS
0
CTS
0
UART reception
Reception
Clock synchronous
control circuit
type
Transmission
Clock synchronous
control circuit
type
CKDIR=0
CKDIR=1
RTS1
CTS1
RCSP=0
CTS from UART0
0
RCSP=1
UART reception
Reception
Clock synchronous
control circuit
type
UART transmission
Transmission
Clock synchronous
control circuit
type
Clock synchronous type
(when internal clock is selected)
CKDIR=0
CKDIR=1
2
2
f
2SIO
TxD
polarity
reversing
circuit
Receive
clock
Transmit/
receive
unit
Transmit
clock
TxD
polarity
reversing
circuit
Receive
clock
Transmit/
receive
unit
Transmit
clock
TxD
polarity
reversing
circuit
Receive
clock
Transmit/
receive
unit
Transmit
clock
Serial I/O
TxD
0
TxD
1
TxD
2