Renesas M16C/60 Series Hardware Manual page 176

Hide thumbs Also See for M16C/60 Series:
Table of Contents

Advertisement

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
Table 1.15.12 STSPSEL Bit Functions
Function
Output of SCLi and SDAi pins
Start/stop condition interrupt
request generation timing
(1) When slave
CKDIR = 1 (external clock)
STSPSEL bit
SCLi
SDAi
(2) When master
CKDIR = 0 (internal clock), CKPH = 1 (clock delayed)
STSPSEL bit
SCLi
SDAi
Figure 1.15.24 STSPSEL Bit Functions
• Arbitration
Unmatching of the transmit data and SDAi pin input data is checked synchronously with the rising
edge of SCLi. Use the UiSMR register's ABC bit to select the timing at which the UiRB register's ABT
bit is updated. If the ABC bit = 0 (updated bitwise), the ABT bit is set to "1" at the same time
unmatching is detected during check, and is set to "0" when not detected. In cases when the ABC bit
is set to "1", if unmatching is detected even once during check, the ABT bit is set to "1" (unmatching
detected) at the falling edge of the clock pulse of 9th bit. If the ABT bit needs to be updated bytewise,
set the ABT bit to "0" (undetected) after detecting acknowledge in the first byte, before transferring the
next byte.
Setting the UiSMR2 register's ALS bit to "1" (SDA output stop enabled) causes arbitration-lost to
occur, in which case the SDAi pin is placed in the high-impedance state at the same time the ABT bit
is set to "1" (unmatching detected).
Rev.1.00
2003.05.30
page 162
STSPSEL = 0
Output of transfer clock and
data
Output of start/stop condition is
accomplished by a program
using ports (not automatically
generated in hardware)
Start/stop condition detection
0
1st 2nd 3rd 4th
Start condition
detection interrupt
Set to "1" in
Set to "0" in
a program
a program
1st 2nd 3rd 4th
Set STAREQ=
1 (start)
Start condition
detection interrupt
Output of a start/stop condition
according to the STAREQ,
RSTAREQ and STPREQ bit
Finish generating start/stop condition
5th
6th 7th 8th
9th bit
Stop condition
detection interrupt
Set to "1" in
a program
5th
6th 7th 8th
9th bit
Set STPREQ=
Stop condition
1 (start)
detection interrupt
Serial I/O (Special Modes)
STSPSEL = 1
Set to "0" in
a program

Advertisement

Table of Contents
loading

This manual is also suitable for:

M16c/6n5

Table of Contents