Renesas M16C/60 Series Hardware Manual page 239

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
Reception
Figure 1.19.26 shows the behavior of the module when receiving two consecutive CAN messages, that fit
into the slot of the shown C0MCTLj register (j = 0 to 15) and leads to losing/overwriting of the first
message.
CANbus
RecReq bit
InvalData bit
NewData bit
MsgLost bit
CAN0 Successful
Reception Interrupt
RecState bit
RecSucc bit
MBOX bit
j = 0 to 15
Figure 1.19.26 Timing of Receive Data Frame Sequence
1) On monitoring a SOF on the CAN bus the RecState bit in the C0STR register becomes "1" (CAN
module is receiver) immediately, given the module has no transmission pending (refer to "Transmission").
2) After successful reception of the message the NewData bit in the C0MCTLj register (j = 0 to 15) of the
receiving slot becomes "1" (stored new data in slot). The InvalData bit in the C0MCTLj register
becomes "1" (message is being updated) at the same time and the InvalData bit becomes "0" (message
is valid) again after the complete message was transferred to the slot.
3) When the interrupt enable bit in the C0ICR register of the receiving slot = 1 (interrupt enabled), the
successful reception interrupt request is occurred and the MBOX bit in the C0STR register changes.
It shows the slot number where the message was stored and the RecSucc bit in the C0STR register is
active.
4) After reading out the message out of the slot, the CPU should set the New Data bit to "0" (the content
of the slot is read or still under processing by the CPU).
5) If the NewData bit is not set to "0" by the CPU and the Receive request for the slot is not disabled
before the next successful reception of a CAN message that is fitting in this slot the MsgLost bit in the
C0MCTLj register becomes "1" (message has been overwritten). The new received message is
transferred to the slot. The interrupt request and change of the C0STR register is same as in 3).
Rev.1.00 2003.05.30 page 225
SOF ACK
(1)
SOF
EOF IF
(2)
(2)
(4)
(3)
Receive slot No.
CAN Module
ACK EOF IF
(5)
(5)
(5)