Renesas M16C/60 Series Hardware Manual page 142

Under development
This document is under development and its contents are subject to change.
M16C/6N5 Group
Timer B2 interrupt occurrences frequency set counter
b7
Note: Use MOV instruction to write to this register.
If the INV01 bit = 1, make sure the TB2S bit also = 0 (timer B2 count stopped) when writing to this register.
If the INV01 bit = 0, although this register can be written even when the TB2S bit = 1 (timer B2 count start), do not
write synchronously with a timer B2 underflow
Timer B2 special mode register (Note 1)
b7 b6 b5 b4 b3 b2
Note 1: Write to this register after setting the PRC1 bit of PRCR register to "1" (write enabled).
Note 2: If the INV11 bit is "0" (three-phase mode 0) or the INV06 bit is "1" (sawtooh wave modulation mode), set this
bit to "0" (timer B2 underflow).
Note 3: Related pins are U(P8
W(P7 /TA2
5 IN
a high-impedance state regardless of which functions of those pins are being used. After forced interrupt
(cutoff), input "H" to the NMI pin and set IVPCR1 bit to "0": this forced cutoff will be reset.
Figure 1.14.6 ICTB2 Register and TB2SC Register
Rev.1.00 2003.05.30 page 128
b0
Symbol
ICTB2
If the INV01 bit is "0" (ICTB2 counter counted every
time timer B2 underflows), assuming the set value
= n, a timer B2 interrupt is generated at every n'th
occurrence of a timer B2 underflow.
If the INV01 bit is "1" (ICTB2 counter count timing
selected by the INV00 bit), assuming the set value
= n, a timer B2 interrupt is generated at every n'th
occurrence of a timer B2 underflow that meets the
condition selected by the INV00 bit.
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
b1 b0
Symbol Address
TB2SC 039E
Bit symbol
Timer B2 reload timing
PWCOM
switching bit
Three-phase output port
IVPCR1 NMI control bit 1
Nothing is assigned. When write, set to "0".
(b7-b2)
When read, its content is "0".
/TA4 ), U(P8 /TA4
0 OUT 1
). If a low-level signal is applied to the NMI pin when the IVPCR1 bit = 1, the target pins go to
Three-phase Motor Control Timer Function
Address After reset
01CD Indeterminate
16
Function
(Note)
After reset
XXXXXX00
16
Bit name
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
occurrences
0 : Three-phase output forcible cutoff
by NMI input (high-impedance)
disabled
1 : Three-phase output forcible cutoff
(Note 3)
by NMI input (high-impedance)
enabled
), V(P7 /CLK /TA1 ), V(P7
IN 2 2 OUT
Setting range
1 to 15
2
Function
(Note 2)
/CTS /RTS /TA1 ), W(P7 /TA2
3 2 2 IN 4
RW
WO
RW
RW
RW
),
OUT