Rewrite The Interrupt Control Register; Watchdog Timer Interrupt - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

1.5.6 Rewrite the Interrupt Control Register

(1) The interrupt control register for any interrupt should be modified in places where no requests for
that interrupt may occur. Otherwise, disable the interrupt before rewriting the interrupt control register.
(2) To rewrite the interrupt control register for any interrupt after disabling that interrupt, be careful with
the instruction to be used.
Changing any bit other than the IR bit
If while executing an instruction, a request for an interrupt controlled by the register being modified
occurs, the IR bit in the register may not be set to "1" (interrupt requested), with the result that the
interrupt request is ignored. If such a situation presents a problem, use the instructions shown
below to modify the register.
Usable instructions: AND, OR, BCLR, BSET
Changing the IR bit
Depending on the instruction used, the IR bit may not always be set to "0" (interrupt not requested).
Therefore, be sure to use the MOV instruction to set the IR bit to "0".
(3) When using the I flag to disable an interrupt, refer to the sample program fragments shown below
as you set the I flag. (Refer to (2) for details about rewrite the interrupt control registers in the sample
program fragments.)
Examples 1 through 3 show how to prevent the I flag from being set to "1" (interrupts enabled) before
the interrupt control register is rewrited, owing to the effects of the internal bus and the instruction
queue buffer.
Example 1: Using the NOP instruction to keep the program waiting until the interrupt control register is modified
INT_SWITCH1:
FCLR I
AND.B
NOP
NOP
FSET I
The number of NOP instruction is as follows.
• PM20 of the PM2 register = 1 (1 wait) : 2
• PM20 = 0 (2 waits) : 3
• When using HOLD function : 4.
Example 2: Using the dummy read to keep the FSET instruction waiting
INT_SWITCH2:
FCLR I
AND.B #00h,0055h
MOV.W MEM,R0
FSET I
Example 3: Using the POPC instruction to changing the I flag
INT_SWITCH3:
PUSHC FLG
FCLR I ;Disable interrupts.
AND.B #00h,0055h ;Set the TA0IC register to "0016 ".
POPC FLG ;Enable interrupts.

1.5.7 Watchdog Timer Interrupt

Initialize the watchdog timer after the watchdog timer interrupt occurs.
Rev.1.00 2003.05.30 page 7
; Disable interrupts.
#00H, 0055H ; Set the TA0IC register to "00
;
; Enable interrupts.
; Disable interrupts.
; Set the TA0IC register to "00
; Dummy read.
; Enable interrupts.
1.5 Precautions for Interrupts
".
16
".
16