I 2 C Bus Address Register 0 To 2 (Iadr0 To Iadr2) - Fujitsu F2MC-16LX Hardware Manual

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CHAPTER 22 I C INTERFACE
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22.2.4 I C Bus Address Register 0 to 2 (IADR0 to IADR2)
The configuration and functions of I
described.
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I C Bus Address Register 0 to 2 (IADR0 to IADR2)
Figure 22.2-8 shows the bit configuration of the I
Figure 22.2-8 I
ch0:000073
ch1:000079
ch2:00007F
[bit 14 to bit 8] A6 to A0
It is a slave address bit. It is a register which specifies the slave address. In the slave, the address data is
compared to the IDAR register upon reception of the address, and if they match, then it will send the
acknowledge to the master.
534
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C bus address register 0 to 2 (IADR0 to IADR2) are
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C Bus address Register 0 to 2 (IADR0 to IADR2)
15 14 13 12
H
A6 A5 A4
H
R/W R/W R/W
H
2
C bus address registers 0 to 2 (IADR0 to IADR2).
11 10 9 8
A3 A2 A1 A0
R/W R/W R/W R/W
IADR0 to IADR2
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I C Bus address register
Initial value XXXXXXXX
B