Figure 3.8.3 External Bus Pin Control Register (Bctr); Table 3.8.3 External Bus Pin Control Register (Bctr) Bit - Fujitsu F2MC-8L MB89620 Series Hardware Manual

3.8 Memory Access Modes
3.8.3 External Bus Pin Control Register (BCTR)
The external bus pin control register (BCTR) specifies whether some of the port 2 pins
operate as output-only ports or as control pins for hold operation and buffer control.
This section describes the functions of the external bus pin control register (BCTR).
n External Bus Pin Control Register (BCTR)
The external bus pin control register (BCTR) functions in external bus mode.
In single-chip mode, the content of the external bus pin control register (BCTR) is ignored and
the P20, P21, and P22 pins function as output-only ports. As the register is write-only, bit
manipulation instructions cannot be used.
Figure 3.8.3 shows the external bus pin control register (BCTR).
Address
0005
H
W : Write-only
— : Unused
X : Indeterminate
: Initial value
Table 3.8.3 lists the functions of each bit of the external bus pin control register (BCTR).

Table 3.8.3 External Bus Pin Control Register (BCTR) Bit

Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MB89620 series
Bit 7 Bit 6 Bit 5 Bit 4
— — — —

Figure 3.8.3 External Bus Pin Control Register (BCTR)

Bit
• The read value is indeterminate .
Unused bits
• Writing has no effect on the operation.
• Selects the operation of the P21 and P22 pins in external bus mode.
• Writing "0" to this bit specifies the P21 and P22 pins to function as output-only
HLD:
ports. Writing "1" specifies P21 to function as a HAK output and P22 to function as
Hold enable bit
the HRQ input.
• Reading this bit always returns "1" .
• Selects the operation of the P20 pin in external bus mode.
BUF:
• Writing "0" to this bit specifies P20 to function as an output-only port. Writing "1"
Buffer control
specifies P20 to function as the BUFC output.
enable bit
• Reading this bit always returns "1" .
Bit 3 Bit 2 Bit 1 Bit 0
— — HLD BUF
W W
BUF
0 Set P20 as a port.
1 Set P20 as the BUFC output.
HLD
0 Set P21 and P22 as ports.
Set P21 as the HAK output and P22
1
as the HRQ input.
Function
Initial value
XXXXXX01
B
Buffer control enable bit
Hold enable bit
CHAPTER 3 CPU
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