16-Bit Timer Register 0 To 2 (Tmr0 To Tmr2)/ 16-Bit Reload Register 0 To 2 (Tmrlr0 To Tmrlr2) - Fujitsu F2MC-16LX Hardware Manual

16.2.2 16-bit Timer Register 0 to 2 (TMR0 to TMR2)/
16-bit Reload Register 0 to 2 (TMRLR0 to TMRLR2)
Configuration and functions of 16-bit timer registers 0 to 2 (TMR0 to TMR2)/16-bit reload
registers 0 to 2 (TMRLR0 to TMRLR2) are described.
16-bit Timer Register 0 to 2 (TMR0 to TMR2)/16-bit Reload Register 0 to 2 (TMRLR0 to
TMRLR2)
Figure 16.2-3 shows the bit configuration of 16-bit timer registers 0 to 2 (TMR0 to TMR2)/16-bit reload
registers (TMRLR0 to TMRLR2).
Figure 16.2-3 Bit Configuration of 16-bit Timer Registers 0 to 2 (TMR0 to TMR2)/16-bit Reload Registers 0
ch0 : 000065
H
ch1 : 000069
H
ch2 : 00006D
H
ch0 : 000064
H
ch1 : 000068
H
ch2 : 00006C
H
∗ : This functions as 16-bit timer register (TMR0 to TMR2) at reading.
This functions as 16-bit timer register (TMRLR0 to TMRLR2) at writing.
16-bit Timer Register 0 to 2 (TMR0 to TMR2)
This register can read the counter value of 16-bit down counter. When the counter operation is permitted
(CNTE = 1 for TMCSR0 to TMCSR2) and the count operation is started, the value written in the 16-bit
reload register is loaded to the registers TMR0 to TMR2 and the count down is started. In the count stop
status (CNTE = 0 for TMCSR0 to TMCSR2), the TMR0 to TMR2 register value is held.
Note:
Always use the word transfer instruction (MOVW A 003AH, etc.) when reading the TMR0 to TMR2
register that is enabled during the counter operation.
The 16-bit timer register (TMR0 to TMR2) has a read-only function despite its location at the same
address as the write-only 16-bit reload register (TMRLR0 to TMRLR2). Therefore, the write process
does not affect the TMR0 to TMR2 value but the TMRLR0 to TMRLR2 is written.
to 2 (TMRLR0 to TMRLR2)
15 14 13 12
D15 D14 D13 D12
(R) (R) (R) (R)
(W) (W) (W) (W)
(X) (X) (X) (X)
7 6 5 4
D07 D06 D05 D04
(R) (R) (R) (R)
(W) (W) (W) (W)
(X) (X) (X) (X)
11 10 9 8
D11 D10 D09 D08
(R) (R) (R) (R)
(W) (W) (W) (W)
(X) (X) (X) (X)
3 2 1 0
D03 D02 D01 D00
(R) (R) (R) (R)
(W) (W) (W) (W)
(X) (X) (X) (X)
CHAPTER 16 16-BIT RELOAD TIMER
TMR0 to TMR2/TMRLR0 to TMRLR2
16-bit timer register/
16-bit reload register (Upper) ∗
Read (TMR0 to TMR2)
Write (TMRLR0 to TMRLR2)
Initial value
TMR0 to TMR2/TMRLR0 to TMRLR2
16-bit timer register/
16-bit reload register (Lower) ∗
Read (TMR0 to TMR2)
Write (TMRLR0 to TMRLR2)
Initial value
393