Fujitsu F2MC-16LX Hardware Manual page 124

CHAPTER 3 INTERRUPT
Coding example
DDR6
ENIR
EIRR
ELVR
ICR03
BAPL
BAPM
BAPH
ISCS
IOAL
IOAH
DCTL
DCTH
ER0
STACK
RW
STACK_T
STACK
;----------Main Program------------------------------------------------------------
CODE
START:
108
EQU 000016H
EQU 00003CH
EQU 00003DH
EQU 00003EH
EQU 0000B3H
EQU 000100H
EQU 000101H
EQU 000102H
EQU 000103H
EQU 000104H
EQU 000105H
EQU 000106H
EQU 000107H
EQU EIRR:0
SSEG
100
RW 1
ENDS
CSEG
AND CCR,#0BFH
MOV RP,#00
MOV A,#!STACK_T
MOV SSB,A
MOVW A,#STACK_T
MOVW SP,A
MOV I:DDR6,#00000000B
MOV BAPL,#00H
MOV BAPM,#30H
MOV BAPH,#00H
MOV ISCS,#00010001B
MOV IOAL,#00H
MOV IOAH,#00H
; Port 6 direction register
; Interruption/DTP permission register
; Interruption/DTP factor register
; A register to specify the required level
; Interrupt control registers 03
; Buffer address pointer lower
; Buffer address pointer middle
; Buffer address pointer upper
2
; EI OS Status
; Lower I/O address pointer
; Higher I/O address pointer
; Data counter lower
; Data counter upper
; Defines external interrupt request flag bit.
; Stack
; Clears the I flag of CCR in PS to disable interrupts.
; Sets register bank pointer.
; Sets system stack
; Setting of stack pointer, in this case,
; S flag = 1, so set to SSP
; Sets the P60/INT0 pin for input.
; Sets buffer address (003000
; No I/O address update, byte transfer
Buffer address updated
; The peripheral function terminates I/O to buffer
transfer.
Yes
; Sets transfer source address (port 0: 000000
)
H
)
H