Movement Of 16-Bit Reload Timer - Fujitsu F2MC-16LX Hardware Manual

16.3

Movement of 16-bit Reload Timer

The 16-bit reload timer setting and the counter operation status transition are
described.
Setting of 16-bit Reload Timer
Setting of internal clock mode
To operate it as an interval timer, the setting shown in Figure 16.3-1 is necessary.
TMCSR0
to
TMCSR2
TMRLR0
to
TMRLR2
Setting of Event Count Mode
To operate it in the event counter mode, the setting shown in Figure 16.3-2 is necessary.
15
TMCSR
TMRLR
DDR3
DDR4
Figure 16.3-1 Setting of Internal Clock Mode
15 14 13 12 11
− − − −
CSL1 CSL0 MOD2 MOD1 MOD0 OUTE OUTL RELD INTE
Other than "11"
Setting initial value (Reload value) of Counter
Used bit
1 Set "1".
Figure 16.3-2 Setting of Event Count Mode
14 13 12 11
− − − −
CSL1 CSL0 MOD2 MOD1 MOD0 OUTE OUTL RELD INTE
Other than "11"
Setting initial value (Reload value) of Counter
Used bit
1 Set "1".
Set the bit corresponding to using pin to "0".
10 9 8 7 6
10 9 8 7 6
D37 D36
D46 D46
CHAPTER 16 16-BIT RELOAD TIMER
5 4 3 2 1
UF CNTE TRG
1
5 4 3 2 1
UF CNTE TRG
1
D35 D34 D33 D32 D31
D45 D44 D43 D42 D41
0
0
D30
D40
395