Ppg Reload Registers (Prll0 To Prll5, Prlh0 To Prlh5) - Fujitsu F2MC-16LX Hardware Manual

17.2.4 PPG Reload Registers (PRLL0 to PRLL5, PRLH0 to
PRLH5)
Configuration and functions of PPG reload registers (PRLL0 to PRLL5, PRLH0 to
PRLH5) are described.

PPG Reload Registers (PRLL0 to PRLL5, PRLH0 to PRLH5)

Figure 17.2-5 shows the bit configuration of PPG reload registers (PRLL0 to PRLL5, PRLH0 to PRLH5).
Figure 17.2-5 PPG Reload Registers ((PRLL0 to PRLL5, PRLH0 to PRLH5)
ch0 : 007900
ch1 : 007902
ch2 : 007904
ch3 : 007906
ch4 : 007908
ch5 : 00790A
ch0 : 007901
ch1 : 007903
ch2 : 007905
ch3 : 007907
ch4 : 007909
ch5 : 00790B
The PPG reload registers (PRLL0 to PRLL5, PRLH0 to PRLH5) are the 8-bit registers that hold the reload
values for the down counter (PCNT). Each of them has roles as shown in the following table:
Register Name
PRLL
PRLH
• Both registers can be read and written.
Note:
When different values are set for the PRLL and PRLH of the ch0, ch2, and ch4 using the 8-bit
prescaler + 8-bit PPG mode, the PPG waveforms of ch1, ch3, and ch5 may be different each other
according to the cycle. Therefore, the same value is recommended to set for the PRLL and PRLH of
the ch0, ch2, and ch4.
H
H
7 6 5
H
D07 D06 D05
H
(R/W) (R/W) (R/W) (R/W) (R/W)
H
(X) (X) (X)
H
H
15 14 13
H
D15 D14 D13
H
H
(R/W) (R/W) (R/W) (R/W) (R/W)
H
(X) (X) (X)
H
Hold the reload value of L side.
Hold the reload value of H side.
4 3 2 1
D04 D03 D02 D01
(R/W) (R/W)
(X) (X) (X) (X)
12 11 10 9
D12 D11 D10 D09
(R/W) (R/W)
(X) (X) (X) (X)
Function
CHAPTER 17 8/16-BIT PPG TIMER
0
PRLL0 to PRLL5
D00
PPG Reload register lower
(R/W)
Read/Write
(X)
Initial value
8
PRLH0 to PRLH5
D08
PPG Reload register upper
Read/Write
(R/W)
Initial value
(X)
415