Sector Configuration Of 3M-Bit Flash Memory - Fujitsu F2MC-16LX Hardware Manual

25.2

Sector Configuration of 3M-bit Flash Memory

Sector configuration of the 3M-bit flash memory is shown.
Sector Configuration
Figure 25.2-1 shows the sector configuration of the 3M-bit flash memory. The upper and lower addresses
of each sector are shown in Figure 25.2-1.
In the case of access from CPU, SA0 is allocated on the F9 bank register, SA1 on the FA bank register,
SA2 on the FB bank register, SA3 on the FD bank register, SA4 on the FE bank register, and SA5 to SA8
on the FF bank register.
*: The writer address
In Figure 25.2-1 is the address corresponding to the CPU address when data is written on the flash memory
with the parallel writer. When writing/erasing is executed using a general-purpose writer, writing/erasing is
executed in this address.
Figure 25.2-1 Sector Configuration of 3M-bit Flash Memory
Flash memory
SA8 (16K bytes)
SA7 ( 8K bytes)
SA6 ( 8K bytes)
SA5 (32K bytes)
SA4 (64K bytes)
SA3 (64K bytes)
Useing disabled
SA2 (64K bytes)
SA1 (64K bytes)
SA0 (64K bytes)
Useing disabled
Writer address*
CPU address
FFFFFF 7FFFF
H H
FFC000 7C000
H H
FFBFFF 7BFFF
H H
FFA000 7A000
H H
FF9FFF 79FFF
H H
FF8000 78000
H H
FF7FFF 77FFF
H H
FF0000 70000
H H
FEFFFF 6FFFF
H H
FE0000 60000
H H
FDFFFF 5FFFF
H H
FD0000 50000
H H
FCFFFF 4FFFF
H H
FC0000 40000
H H
FBFFFF 3FFFF
H H
FB0000 30000
H H
FAFFFF 2FFFF
H H
FA0000 20000
H H
F9FFFF 1FFFF
H H
F90000 10000
H H
F8FFFF 0FFFF
H H
F80000 00000
H H
CHAPTER 25 3M-BIT FLASH MEMORY
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