13.3 Registers and Register Details
13.3.3 Unit address register (MAWH, MAWL)
Unit address register (MAWH, MAWL)
Address: 000071
H
Reserved Reserved
Read/write
Initial value
Address: 000070
H
Read/write
Initial value
These two registers MAWH, MAWL are used to set its own unit address (12 bits). When the unit is config-
ured as master, the unit address set in MAWH, MAWL is transmitted as master address. When it is config-
ured as slave mode, this unit address is used to compare with the received slave address.
Bit 15 to 12 are reserved bits and always write '1' to them. The read values are undefined.
Note:Make sure to set the unit address before the communication inhibit state is released.
13.3.4 Slave address register (SAWH, SAWL)
Slave address register (SAWH, SAWL)
Address: 000073
H
Reserved Reserved
Read/write
Initial value
Address: 000072
H
Read/write
Initial value
These two registers SAWH, SAWL are used to set the slave address (12 bits) for master transmit.
Bit 15 to 12 are reserved bits and always write '1' to them. The read values are undefined.
Note:Make sure to set the slave address before the communication inhibit state is
released.
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Chapter 13: IE Bus
15
14
13
Reserved Reserved
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
7
6
5
MA07
MA06
MA05
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
15
14
13
Reserved
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
7
6
5
SA07
SA06
SA05
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
12
11
10
MA11
MA10
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
4
3
MA04
MA03
MA02
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
12
11
10
Reserved
SA11
SA10
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
4
3
2
SA04
SA03
SA02
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
9
8
MA09
MA08
(R/W)
(R/W)
(X)
(X)
2
1
0
MA01
MA00
(R/W)
(R/W)
(X)
(X)
9
8
SA09
SA08
(R/W)
(R/W)
(X)
(X)
1
0
SA01
SA00
(R/W)
(R/W)
(X)
(X)
MB90580 Series
Bit Number
MAWH
Bit Number
MAWL
Bit Number
SAWH
Bit Number
SAWL