Fujitsu F2MC-16LX Hardware Manual page 390

16-bit microcontroller mb90330 series
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CHAPTER 15 PWC TIMER
Timer Cycle
If 0000
H
after 65536 times counted up to stop the count. The time period from the start to the stop is calculated by
the following expression:
T
=(65536-n
1
T
: Time from startup to stop (µs)
1
n
: Timer value written in the PWCR at the start
1
t: Count Clock cycle (µs)
If 0000
H
every 65536-time counted up. Reload cycle time is calculated by the following expression:
T
=(65536-n
R
T
: Reload cycle (overflow cycle) (µs)
R
n
: Reload value held in the PWCR
R
t: Count Clock cycle (µs)
Count Clock and Maximum Cycle
Maximum cycle is provided when 0000
The count clock cycle and the maximum cycle of the timer are shown in Table 15.3-5 when the machine
clock frequency (called F hereafter) is 24 MHz.
Table 15.3-5 Count Clock and Cycle
Count clock selection
Count Clock Cycle
Timer maximum cycle
374
is set to the PWCR in the one-shot operation mode and the timer is started, an overflow occurs
) • t
1
is set to the PWCR in the reload operation mode and the timer is started, an overflow occurs at
) • t
R
in CSK1,CSK0=00:(Φ/4)
0.17 µs
10.92 ms
is set for the PWCR value in the timer mode.
H
in CSK1,CSK0=00:(Φ/16)
0.67 µs
43.7 ms
in CSK1,CSK0=00:(Φ/32)
1.33 µs
87.4 ms

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