Effective Address Field - Fujitsu F2MC-16LX Hardware Manual

APPENDIX
B.6

Effective Address Field

Table B.6-1 shows the effective address fields.
Effective Address Field
Table B.6-1 Effective Address Field
Code Representation
00 R0 RW0
01 R1 RW1
02 R2 RW2
03 R3 RW3
04 R4 RW4
05 R5 RW5
06 R6 RW6
07 R7 RW7
08 @RW0
09 @RW1
0A @RW2
0B @RW3
0C @RW0+
0D @RW1+
0E @RW2+
0F @RW3+
10 @RW0+disp8
11 @RW1+disp8
12 @RW2+disp8
13 @RW3+disp8
14 @RW4+disp8
15 @RW5+disp8
16 @RW6+disp8
17 @RW7+disp8
18 @RW0+disp16
19 @RW1+disp16
1A @RW2+disp16
1B @RW3+disp16
1C @RW0+RW7
1D @RW1+RW7
1E @PC+disp16
1F addr16
*: The number of bytes in the address extended section corresponds to + of # (number of bytes) in "Appendix
2
B.8 F MC-16LX Instruction List".
632
Address format
RL0
(RL0) Register direct
RL1 "ea" corresponds to the following models
(RL1) from left, sequentially.
• Byte
RL2
• word
(RL2)
• long word
RL3
(RL3)
Register indirect
With post increment
Register indirect
With 8-bit displacement
Register indirect
Register indirect with 16-bit displacement
Register indirect with index
Register indirect with index
PC indirect/direct
displacement
Byte count of
extended
address part
address with16-bit
*
-
0
0
1
2
0
0
2
2