I 2 C Bus Address Register 0 (Iadr0) - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
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19.2.4 I C Bus Address Register 0 (IADR0)
The configuration and functions of I
2
■ I
C Bus Address Register 0 (IADR0)
Figure 19.2-8 shows the bit configuration of the I
ch.0:000073
R/W : Readable/writable
- : Undefined
X : Undefined value
[bit14 to bit8] A6 to A0
It is a slave address bit. It is a register which specifies the slave address. In the slave, the address data is
compared to the IDAR0 register upon reception of the address, and if they match, then it will send the
acknowledge to the master.
CM44-10137-6E
2
C bus address register 0 (IADR0) are described.
2
Figure 19.2-8 I C Bus Address Register 0 (IADR0)
bit 15 14 13 12
A6 A5 A4
H
R/W R/W R/W R/W R/W
FUJITSU MICROELECTRONICS LIMITED
2
C bus address registers 0 (IADR0).
IADR0
11 10 9 8
2
I
A3 A2 A1 A0
Initial value
R/W R/W
2
CHAPTER 19 I C INTERFACE
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19.2 I C Interface Register
C bus address register 0
XXXXXXXX
B
445