Fujitsu F2MC-16LX Hardware Manual page 85

Example of Multiple Interrupts
Aa an example of multiple interrupt processing, set the A/D converter interrupt level to 2 and the timer
interrupt level to "1", considering a case when timer interrupts are to be given higher priority than A/D
converter interrupts. At this time, the handling is executed as shown in Figure 3.4-5 if a time interrupt is
generated during the A/D converter interrupt handling.
Main program
Initialize
peripheral
A/D interrupt
generation
Main processing
restart
A/D Interruption generation
At the start of the A/D converter interrupt handling, the ILM is automatically set to the same value as the
A/D converter interrupt level (IL2 to IL0 in ICR). If a Level 1 or 0 interrupt request is generated, the
interrupt handling makes it a higher priority in execution.
End of interrupt processing
When the interrupt processing has completed and the return instruction (RETI) is executed, the values of
the dedicated registers (A, DPR, ADB, DTB, PCB, PC, PS) saved in the stack are returned and the interrupt
level mask register (ILM) has the values before the interrupt.
Figure 3.4-5 Example of Multiple Interrupts
A/D interrupt processing
Interrupt level 2
(ILM=010 )
B
(1)
(3)
(2)
Suspend
Restert
(8)
(6)
(7)
Timer interrupt processing
Interrupt level 1
(ILM=001 )
B
Timer interrupt
generation
A/D interrupt
processing
A/D interrupt return
CHAPTER 3 INTERRUPT
Timer interrupt
(4)
processing
Timer interrupt
(5)
return
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